feat[STM32][SPI]: add interrupt transfer mode support#11368
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refine the stm32 hard spi dma configuration hierarchy with shared feature macros align dma flag usage with rt-device dma flags and gate dma-only fields and paths make the dma transfer threshold configurable through BSP_SPI_DMA_TRANS_MIN_LEN
introduce interrupt transfer route selection and SPI IRQ visibility macros unify DMA and INT completion handling with timeout-triggered abort recovery keep short transfers on polling and use DMA or INT only when eligible refine STM32 SPI init and IRQ registration paths for mixed transfer backends
📌 Code Review Assignment🏷️ Tag: bsp_stm32Reviewers: Liang1795 hamburger-os wdfk-prog Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-05-11 10:52 CST)
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Pull request overview
Adds STM32 hardware SPI interrupt transfer-mode scaffolding and refactors transfer-mode selection around POLL/DMA/INT paths.
Changes:
- Adds aggregate SPI POLL/DMA/INT/IRQ capability macros.
- Updates
spixfer()routing to choose polling, DMA, or interrupt transfers and wait for async completion. - Adds SPI IRQ handling updates, including SPI6 IRQ support and async error callback handling.
Reviewed changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 4 comments.
| File | Description |
|---|---|
bsp/stm32/libraries/HAL_Drivers/drivers/drv_spi.h |
Adds SPI capability aggregation macros and updates STM32 SPI driver state fields. |
bsp/stm32/libraries/HAL_Drivers/drivers/drv_spi.c |
Refactors SPI transfer routing, async completion handling, DMA setup guards, and IRQ handlers. |
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| rt_bool_t async_started = RT_TRUE; | ||
| #ifdef BSP_SPI_USING_IRQ | ||
| /* Ensure that the current completion volume is solely associated with the current affairs.*/ |
| * Change Logs: | ||
| * Date Author Notes | ||
| * 2018-11-5 SummerGift first version | ||
| * 2026-04-16 wdfk-prog Add SPI interrupt transfer mode scaffolding |
| struct rt_spi_configuration *cfg; | ||
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| struct rt_spi_bus spi_bus; | ||
| rt_uint16_t spi_dma_flag; |
| else if (message->recv_buf) | ||
| { | ||
| /* clear the old error flag */ | ||
| __HAL_SPI_CLEAR_OVRFLAG(spi_handle); |
拉取/合并请求描述：(PR description)
[
为什么提交这份PR (why to submit this PR)
当前 STM32 SPI 驱动主要依赖轮询和 DMA 传输路径，缺少统一的中断传输模式配置与调度入口。不同 SPI 实例的 DMA/IRQ 配置宏也较分散，后续扩展和维护成本较高。
本 PR 用于补充 SPI 中断传输模式，并整理 STM32 SPI 驱动的传输方式配置层级，使 POLL、DMA、INT 相关能力可以按 TX/RX 和具体 SPI 实例统一派生。
你的解决方案是什么 (what is your solution)
drv_spi.h中增加 STM32 SPI POLL、DMA、INT、IRQ 相关聚合宏，统一判断各 SPI 实例的传输能力。RT_DEVICE_FLAG_DMA_RX、RT_DEVICE_FLAG_DMA_TX、RT_DEVICE_FLAG_INT_RX、RT_DEVICE_FLAG_INT_TX。spixfer()中增加 DMA/INT/POLL 路由逻辑，默认小于 32 字节使用轮询，较长传输优先使用 DMA，中断模式作为可配置的异步传输路径。请提供验证的bsp和config (provide the config and bsp)
BSP_USING_SPIx、BSP_SPIx_RX_USING_DMA、BSP_SPIx_TX_USING_DMA、BSP_SPIx_RX_USING_INT、BSP_SPIx_TX_USING_INT。]
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality：
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up