Bump difftest: connect AXI inside when !isFPGA#259
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Previous #258 always expose CPU/MEM AXI ports and connect them in Difftest. This change move the connect back to DUT inside by default, and only override `cpu <> mem` with `cpu <> cpuIO` and `mem <> memIO` when isFPGA with DifftestMemCtrl.exposeIO(cpuAXI,memAXI).
poemonsense
approved these changes
Jun 3, 2026
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Previous #258 always expose CPU/MEM AXI ports and connect them in Difftest.
This change move the connect back to DUT inside by default, and only
override
cpu <> memwithcpu <> cpuIOandmem <> memIOwhenisFPGA with DifftestMemCtrl.exposeIO(cpuAXI,memAXI).